LM3S5G51 Datasheet, PDF (1162/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Signal Tables
Table 23-8. Signals by Signal Name (continued)
Pin Name
Fault0
Fault1
Fault2
Fault3
GND
GNDA
Pin Number Pin Mux / Pin
Assignment
B2
PE4 (4)
J2
PG3 (8)
J1
PG2 (4)
K6
PJ2 (10)
L9
PF4 (4)
E11
PB3 (2)
A12
PE1 (3)
D10
PH3 (2)
A3
PD6 (1)
L7
PG6 (8)
M7
PG5 (5)
K3
PG4 (4)
K4
PF7 (9)
A7
PB6 (4)
J2
PG3 (4)
M1
PC5 (4)
F10
PH5 (10)
E11
PB3 (4)
D11
PH2 (4)
C4
fixed
C5
J3
K5
L10
K10
J10
F11
F12
A5
fixed
Pin Type
I
I
I
I
-
-
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
I2S0RXMCLK
I2S0RXSCK
I2S0RXSD
M12
fixed
O
A11
PB2 (1)
I/O
E11
PB3 (1)
I/O
F3
PJ0 (11)
I/O
K1
PG0 (3)
L3
PA0 (8)
L6
PA6 (1)
K2
PG1 (3)
I/O
M3
PA1 (8)
M6
PA7 (1)
B6
PJ1 (11)
J2
PG3 (9)
I/O
L4
PA3 (9)
C6
PD5 (8)
G1
PD0 (8)
I/O
M7
PG5 (9)
J1
PG2 (9)
I/O
M4
PA2 (9)
B5
PD4 (8)
Buffer Type^a Description
TTL
PWM Fault 0.
TTL
PWM Fault 1.
TTL
PWM Fault 2.
TTL
PWM Fault 3.
Power Ground reference for logic and I/O pins.
Power
OD
OD
OD
OD
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
Hibernate mode.
I²C module 0 clock.
I²C module 0 data.
I²C module 1 clock.
OD
I²C module 1 data.
TTL
I²S module 0 receive master clock.
TTL
I²S module 0 receive clock.
TTL
I²S module 0 receive data.
1162
Texas Instruments-Production Data
January 23, 2012