LM3S5G51 Datasheet, PDF (1077/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Bit/Field
1
0
Name
FAULT1
FAULT0
Type
R/W
R/W
Reset
0
0
Description
Fault1 Input
Value Description
0 The Fault1 signal is suppressed and cannot generate a fault
condition.
1 The Fault1 signal value is ORed with all other fault condition
generation inputs (Faultn signals and digital comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Fault0 Input
Value Description
0 The Fault0 signal is suppressed and cannot generate a fault
condition.
1 The Fault0 signal value is ORed with all other fault condition
generation inputs (Faultn signals and digital comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
January 23, 2012
Texas Instruments-Production Data
1077