LM3S5G51 Datasheet, PDF (1122/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Signal Tables
Table 23-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PE1
I/O
TTL
GPIO port E bit 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
75
Fault0
I
TTL
PWM Fault 0.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
SSI1Fss
I/O
TTL
SSI module 1 frame.
PH4
I/O
TTL
GPIO port H bit 4.
76
SSI1Clk
I/O
TTL
SSI module 1 clock.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
PC3
I/O
TTL
GPIO port C bit 3.
77
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
PH3
I/O
TTL
GPIO port H bit 3.
Fault0
83
PhB0
I
TTL
PWM Fault 0.
I
TTL
QEI module 0 phase B.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
PH2
I/O
TTL
GPIO port H bit 2.
C1o
O
TTL
Analog comparator 1 output.
84
Fault3
I
TTL
PWM Fault 3.
IDX1
I
TTL
QEI module 1 index.
PH1
I/O
TTL
GPIO port H bit 1.
CCP7
I/O
TTL
Capture/Compare/PWM 7.
85
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
PH0
I/O
TTL
GPIO port H bit 0.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
86
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
1122
Texas Instruments-Production Data
January 23, 2012