LM3S5G51 Datasheet, PDF (1151/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Table 23-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PJ1
I/O
TTL
GPIO port J bit 1.
I2C1SDA
I/O
OD
I²C module 1 data.
B6
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
PB5
I/O
TTL
GPIO port B bit 5.
AIN11
I
Analog Analog-to-digital converter input 11.
C0o
O
TTL
Analog comparator 0 output.
C1-
I
Analog Analog comparator 1 negative input.
CAN0Tx
O
TTL
CAN module 0 transmit.
B7
CCP0
I/O
TTL
Capture/Compare/PWM 0.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
PC2
I/O
TTL
GPIO port C bit 2.
B8
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
B9
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PH4
I/O
TTL
GPIO port H bit 4.
B10
SSI1Clk
USB0PFLT
I/O
TTL
SSI module 1 clock.
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
PE0
I/O
TTL
GPIO port E bit 0.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
B11
PWM4
SSI1Clk
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
I/O
TTL
SSI module 1 clock.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
B12
USB0RBIAS
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
C1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
C2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
VDDC
C3
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 25-6 on page 1191.
C4
GND
-
Power Ground reference for logic and I/O pins.
C5
GND
-
Power Ground reference for logic and I/O pins.
January 23, 2012
Texas Instruments-Production Data
1151