LM3S5G51 Datasheet, PDF (1148/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Signal Tables
Table 23-6. Possible Pin Assignments for Alternate Functions (continued)
# of Possible Assignments
six
seven
eight
nine
Alternate Function
CCP4
IDX0
PWM0
PWM1
PhB0
U1Rx
U1Tx
CCP5
USB0PFLT
CCP1
PWM4
PWM5
CCP0
CCP2
CCP3
Fault0
GPIO Function
PA7 PC4 PC7 PD5 PE2 PF7
PB2 PB4 PB6 PD0 PD7 PG5
PA6 PD0 PF0 PG0 PG2 PJ0
PA7 PD1 PF1 PG1 PG3 PJ1
PC6 PC7 PE3 PF0 PF7 PH3
PA0 PB0 PB4 PC6 PD0 PD2
PA1 PB1 PB5 PC7 PD1 PD3
PB5 PB6 PC4 PD2 PE5 PG5 PG7
PA7 PB3 PC6 PC7 PE0 PH4 PJ1
PA6 PB1 PB6 PC4 PC5 PD7 PE3 PF6
PA2 PA6 PE0 PE6 PF2 PG0 PH0 PH6
PA3 PA7 PE1 PE7 PF3 PG1 PH1 PH7
PB0 PB2 PB5 PC6 PC7 PD3 PD4 PF4 PJ2
PB1 PB5 PC4 PD1 PD5 PE1 PE2 PE4 PF5
PA7 PB2 PC5 PC6 PD4 PE0 PE4 PF1 PG4
PB3 PD6 PE1 PE4 PF4 PG2 PG3 PH3 PJ2
23.2 108-Ball BGA Package Pin Tables
Table 23-7. Signals by Pin Number
Pin Number
A1
A2
A3
Pin Name
PE6
AIN1
C1o
PWM4
U1CTS
PD7
AIN4
C0o
CCP1
I2S0TXWS
IDX0
U1DTR
PD6
AIN5
Fault0
I2S0TXSCK
U2Tx
Pin Type
I/O
I
O
O
I
I/O
I
O
I/O
I/O
I
O
I/O
I
I
I/O
O
Buffer Type^a Description
TTL
GPIO port E bit 6.
Analog Analog-to-digital converter input 1.
TTL
Analog comparator 1 output.
TTL
PWM 4. This signal is controlled by PWM Generator 2.
TTL
UART module 1 Clear To Send modem flow control input signal.
TTL
GPIO port D bit 7.
Analog Analog-to-digital converter input 4.
TTL
Analog comparator 0 output.
TTL
Capture/Compare/PWM 1.
TTL
I²S module 0 transmit word select.
TTL
QEI module 0 index.
TTL
UART module 1 Data Terminal Ready modem status input signal.
TTL
GPIO port D bit 6.
Analog Analog-to-digital converter input 5.
TTL
PWM Fault 0.
TTL
I²S module 0 transmit clock.
TTL
UART module 2 transmit. When in IrDA mode, this signal has IrDA
modulation.
1148
Texas Instruments-Production Data
January 23, 2012