C8051F850-C-GM Datasheet, PDF (70/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

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8. Clear the PSWE bit.
Steps 5–7 must be repeated for each byte to be written. After flash writes are complete, PSWE should be
cleared so that MOVX instructions do not target program memory.
10.3. Non-Volatile Data Storage
The flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX
write instruction and read using the MOVC instruction. Note: MOVX read instructions always target XRAM.
10.4. Flash Write and Erase Guidelines
Any system which contains routines which write or erase flash memory from software involves some risk
that the write or erase routines will execute unintentionally if the CPU is operating outside its specified
operating range of supply voltage, system clock frequency or temperature. This accidental execution of
flash modifying code can result in alteration of flash memory contents causing a system failure that is only
recoverable by re-flashing the code in the device.
To help prevent the accidental modification of flash by firmware, hardware restricts flash writes and
erasures when the supply monitor is not active and selected as a reset source. As the monitor is enabled
and selected as a reset source by default, it is recommended that systems writing or erasing flash simply
maintain the default state.
The following guidelines are recommended for any system which contains routines which write or erase
flash from code.
10.4.1. Voltage Supply Maintenance and the Supply Monitor
1. If the system power supply is subject to voltage or current "spikes," add sufficient transient
protection devices to the power supply to ensure that the supply voltages listed in the Absolute
Maximum Ratings table are not exceeded.
2. Make certain that the minimum supply rise time specification is met. If the system cannot meet this
rise time specification, then add an external supply brownout circuit to the RST pin of the device
that holds the device in reset until the voltage supply reaches the lower limit, and re-asserts RST if
the supply drops below the low supply limit.
3. Do not disable the supply monitor. If the supply monitor must be disabled in the system, firmware
should be added to the startup routine to enable the on-chip supply monitor and enable the supply
monitor as a reset source as early in code as possible. This should be the first set of instructions
executed after the reset vector. For C-based systems, this may involve modifying the startup code
added by the C compiler. See your compiler documentation for more details. Make certain that
there are no delays in software between enabling the supply monitor and enabling the supply
monitor as a reset source. Code examples showing this can be found in “AN201: Writing to Flash
From Firmware", available from the Silicon Laboratories web site. Note that the supply monitor
must be enabled and enabled as a reset source when writing or erasing flash memory. A
flash error reset will occur if either condition is not met.
4. As an added precaution if the supply monitor is ever disabled, explicitly enable the supply monitor
and enable the supply monitor as a reset source inside the functions that write and erase flash
memory. The supply monitor enable instructions should be placed just after the instruction to set
PSWE to a 1, but before the flash write or erase operation instruction.
5. Make certain that all writes to the RSTSRC (Reset Sources) register use direct assignment
operators and explicitly DO NOT use the bit-wise operators (such as AND or OR). For example,
"RSTSRC = 0x02" is correct. "RSTSRC |= 0x02" is incorrect.
6. Make certain that all writes to the RSTSRC register explicitly set the PORSF bit to a '1'. Areas to
check are initialization code which enables other reset sources, such as the Missing Clock
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