C8051F850-C-GM Datasheet, PDF (262/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Table 24.5. SMBus Status Decoding: Hardware ACK Disabled (EHACK = 0) (Continued)
Values Read
Values to
Write
Current SMbus State
Typical Response Options
0010
0
1
X
Lost arbitration while attempting a
repeated START.
0001
0
1
X
Lost arbitration due to a detected
STOP.
0000
1
1
X
Lost arbitration while transmitting a
data byte as master.
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
00X —
1 0 X 1110
00X —
1 0 X 1110
000 —
1 0 0 1110
Table 24.6. SMBus Status Decoding: Hardware ACK Enabled (EHACK = 1)
Values Read
Values to
Write
Current SMbus State
Typical Response Options
1110 0 0 X A master START was generated.
0
0
0
A master data or address byte was
transmitted; NACK received.
1100
0
0
1
A master data or address byte was
transmitted; ACK received.
Load slave address + R/W into _{0 0 X 1100}
SMB0DAT.
Set STA to restart transfer.
1 0 X 1110
Abort transfer.
01X —
Load next data byte into SMB0- _{0 0 X 1100}
DAT.
End transfer with STOP.
01X —
End transfer with STOP and start _{1 1 X —}
another transfer.
Send repeated START.
1 0 X 1110
Switch to Master Receiver Mode _{0 0 1 1000}
(clear SI without writing new data
to SMB0DAT). Set ACK for initial
data byte.
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Rev. 1.0