C8051F850-C-GM Datasheet, PDF (112/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Register 14.6. ADC0TK: ADC0 Burst Mode Track Time
Bit
7
6
5
4
3
2
1
0
Name AD12SM Reserved
ADTK
Type
RW
RW
RW
Reset
0
0
0
1
1
1
1
0
SFR Address: 0xB9
Table 14.9. ADC0TK Register Bit Descriptions
Bit
Name
Function
7
AD12SM 12-Bit Sampling Mode.
This bit controls the way that the ADC samples the input when in 12-bit mode. When the
ADC is configured for multiple 12-bit conversions in burst mode, the AD12SM bit should
be cleared to 0.
0: The ADC will re-track and sample the input four times during a 12-bit conversion.
1: The ADC will sample the input once at the beginning of each 12-bit conversion. The
ADTK field can be set to 63 to maximize throughput.
6
Reserved Must write reset value.
5:0
ADTK Burst Mode Tracking Time.
This field sets the time delay between consecutive conversions performed in Burst
Mode. When ADTM is set, an additional 4 SARCLKs are added to this time.
T_BMTK
=
6---4-----–----A-----D----T----K---
F_HFOSC
The Burst Mode track delay is not inserted prior to the first conversion. The required
tracking time for the first conversion should be defined with the ADPWR field.
98
Rev. 1.0