C8051F850-C-GM Datasheet, PDF (327/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

DOCUMENT CHANGE LIST
Revision 0.5 to Revision 0.6
 Updated front page block diagram.
 Updated ADC supply current parameters in Table 1.2, “Power Consumption,” on page 8.
 Corrected flash programming voltage range in "Table 1.4. Flash Memory" on page 11.
 Added ADC Power-On Time specification in Table 1.7, “ADC,” on page 13.
 Added section "1.2. Typical Performance Curves" on page 19.
 Corrected DERIVID Information in Table 11.3, “DERIVID Register Bit Descriptions,” on page 66.
 Updated ADC chapter ("14. Analog-to-Digital Converter (ADC0)" on page 79) and expanded section
"14.5. Power Considerations" on page 85 with recommended power configuration settings.
 Updated Figure 21.1, “Port I/O Functional Block Diagram,” on page 176.
 Corrected reset value in Register 24.5, “SMB0ADM: SMBus0 Slave Address Mask,” on page 246.
 Corrected description of IE0 in "Table 25.4. TCON Register Bit Descriptions" on page 259.
Revision 0.6 to Revision 0.7
 Added mention of the UID to the front page.
 Updated some TBD values in the "1. Electrical Specifications" on page 8 section.
 Updated Power-On Reset (POR) Threshold maximum Falling Voltage on V_DD specification in Table 1.3.
 Updated Reset Delay from non-POR source typical specification in Table 1.3.
 Removed V_DD Ramp Time maximum specification in Table 1.3.
 Updated Flash Memory Erase Time specification and added Note 2 to Table 1.4.
 Updated maximum ADC DC performance specifications in Table 1.7.
 Updated minimum and maximum ADC offset error and slope error specifications in Table 1.7.
 Updated conditions on Internal Fast Settling Reference Output Voltage (Full Temperature and Supply
Range) in Table 1.8.
 Added a new section "1.2.3. Port I/O Output Drive" on page 21.
 Updated pinout Figure 3.1, Figure 3.2, Figure 3.3, Table 3.1, Table 3.2, and Table 3.3 titles to the
correct part numbers.
 Updated the Ordering Information ("4. Ordering Information" on page 40.) for Revision C devices.
 Added mention of the unique identifier to "8. Memory Organization" on page 49.
 Added unique identifier information to "11. Device Identification and Unique Identifier" on page 64.
 Updated device part numbers listed in Table 11.3, “DERIVID Register Bit Descriptions,” on page 66 to
include the revision.
 Added "28. Revision-Specific Behavior" on page 284.
Revision 0.7 to Revision 1.0
 Updated Digital Core, ADC, and Temperature Sensor electrical specifications information for -I devices.
 Updated -I part number information in "4. Ordering Information" on page 40.
 Replaced reference to AMX0P and AMX0N with ADC0MX in Table 21.1, “Port I/O Assignment for
Analog Functions,” on page 178.
 Added a note to Table 1.13, “Absolute Maximum Ratings,” on page 22 and added a link to the Quality
and Reliability Monitor Report.
 Added Operating Junction Temperature to Table 1.13, “Absolute Maximum Ratings,” on page 22.
 Updated all TBDs in "1. Electrical Specifications" on page 8.
Rev. 1.0
293