C8051F850-C-GM Datasheet, PDF (15/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Table 1.7. ADC (Continued)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Offset Error
E_OFF
12 Bit Mode, VREF = 1.65 V
–3
0
10 Bit Mode, VREF = 1.65 V
–2
0
3
LSB
2
LSB
Offset Temperature Coeffi-
cient
Slope Error
TC_OFF
E_M
12 Bit Mode
10 Bit Mode
— 0.004 — LSB/°C
— ±0.02 ±0.1
%
— ±0.06 ±0.24 %
Dynamic Performance 10 kHz Sine Wave Input 1dB below full scale, Max throughput, using AGND pin
Signal-to-Noise
SNR
12 Bit Mode
61
66
—
dB
10 Bit Mode
53
60
—
dB
Signal-to-Noise Plus Distor- SNDR
tion
12 Bit Mode
10 Bit Mode
61
66
—
dB
53
60
—
dB
Total Harmonic Distortion
(Up to 5th Harmonic)
THD
12 Bit Mode
10 Bit Mode
—
71
—
dB
—
70
—
dB
Spurious-Free Dynamic
Range
SFDR
12 Bit Mode
10 Bit Mode
—
–79
—
dB
—
–74
—
dB
*Note: Absolute input pin voltage is limited by the V_DD supply.
Rev. 1.0
14