C8051F850-C-GM Datasheet, PDF (242/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Table 23.2. SPI0CFG Register Bit Descriptions
Bit
Name
Function
0
RXBMT Receive Buffer Empty (valid in slave mode only).
This bit will be set to logic 1 when the receive buffer has been read and contains no new
information. If there is new information available in the receive buffer that has not been
read, this bit will return to logic 0. RXBMT = 1 when in Master Mode.
Note: In slave mode, data on MOSI is sampled in the center of each data bit. In master mode, data on MISO is sampled one
SYSCLK before the end of each data bit, to provide maximum settling time for the slave device.
219
Rev. 1.0