C8051F850-C-GM Datasheet, PDF (313/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

27. Watchdog Timer (WDT0)
The C8051F85x/86x family includes a programmable Watchdog Timer (WDT) running off the low-
frequency oscillator. A WDT overflow will force the MCU into the reset state. To prevent the reset, the WDT
must be restarted by application software before overflow. If the system experiences a software or
hardware malfunction preventing the software from restarting the WDT, the WDT will overflow and cause a
reset.
Following a reset the WDT is automatically enabled and running with the default maximum time interval. If
desired the WDT can be disabled by system software or locked on to prevent accidental disabling. Once
locked, the WDT cannot be disabled until the next system reset. The state of the RST pin is unaffected by
this reset.
The WDT consists of an internal timer running from the low-frequency oscillator. The timer measures the
period between specific writes to its control register. If this period exceeds the programmed limit, a WDT
reset is generated. The WDT can be enabled and disabled as needed in software, or can be permanently
enabled if desired. When the WDT is active, the low-frequency oscillator is forced on. All watchdog
features are controlled via the Watchdog Timer Control Register (WDTCN).
LFOSC0
Watchdog Timer
Lock and Key
Watchdog Timer
Timeout Interval
Watchdog
Reset
Figure 27.1. Watchdog Timer Block Diagram
Rev. 1.0
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