C8051F850-C-GM Datasheet, PDF (57/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

8. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization of the
C8051F85x/86x device family is shown in Figure 8.1.
PROGRAM/DATA MEMORY
(FLASH)
0x1FFF
8 kB FLASH
(In-System
Programmable in 512
Byte Sectors)
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
DATA MEMORY (RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing
Only)
Special Function
Registers
(Direct Addressing Only)
(Direct and Indirect Addressing)
32 Bit-Addressable Bytes
32 General Purpose Registers
Lower 128 RAM
(Direct and Indirect
Addressing)
0xFFFF
EXTERNAL DATA ADDRESS SPACE
Same 256 bytes as 0x0000 to 0x00FF,
wrapped on 256-byte boundaries
0x0000
0x0100
0x00FF
0x0000
XRAM - 256 Bytes
(accessable using MOVX instruction)
Figure 8.1. C8051F85x/86x Memory Map (8 kB flash version shown)
Rev. 1.0
49