C8051F850-C-GM Datasheet, PDF (282/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

25.2.3. Capture Mode
Capture mode allows an external input (Timer 2) or the low-frequency oscillator clock (Timer 3) to be
measured against the system clock or an external oscillator source. The timer can be clocked from the
system clock, the system clock divided by 12, or the external oscillator divided by 8, depending on the
TnML, and TnXCLK settings.
Setting TFnCEN to 1 enables Capture Mode. In this mode, TnSPLIT should be set to 0, as the full 16-bit
timer is used. Upon a falling edge of the input capture signal, the contents of the timer register
(TMRnH:TMRnL) are loaded into the reload registers (TMRnRLH:TMRnRLL) and the TFnH flag is set. By
recording the difference between two successive timer capture values, the period of the captured signal
can be determined with respect to the selected timer clock.
TnXCLK
TnML
SYSCLK / 12
0
External Clock / 8
1
SYSCLK
0
TRn
TCLK
TMRnL TMRnH
1
Capture
T2 Pin (Timer 2)
L-F Oscillator (Timer 3)
TFnCEN
TMRnRLL TMRnRLH
Figure 25.6. Capture Mode Block Diagram
TFnH
(Interrupt)
254
Rev. 1.0