C8051F850-C-GM Datasheet, PDF (110/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Register 14.4. ADC0AC: ADC0 Accumulator Configuration
Bit
7
6
5
4
3
2
1
0
Name AD12BE ADAE
ADSJST
ADRPT
Type
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
SFR Address: 0xB3
Table 14.7. ADC0AC Register Bit Descriptions
Bit
Name
Function
7
AD12BE 12-Bit Mode Enable.
Enables 12-bit Mode. In 12-bit mode, the ADC throughput is reduced by a factor of 4.
0: 12-bit Mode Disabled.
1: 12-bit Mode Enabled.
6
ADAE Accumulate Enable.
Enables multiple conversions to be accumulated when burst mode is disabled.
0: ADC0H:ADC0L contain the result of the latest conversion when Burst Mode is dis-
abled.
1: ADC0H:ADC0L contain the accumulated conversion results when Burst Mode is dis-
abled. Software must write 0x0000 to ADC0H:ADC0L to clear the accumulated result.
5:3
ADSJST Accumulator Shift and Justify.
Specifies the format of data read from ADC0H:ADC0L. All remaining bit combinations
are reserved.
000: Right justified. No shifting applied.
001: Right justified. Shifted right by 1 bit.
010: Right justified. Shifted right by 2 bits.
011: Right justified. Shifted right by 3 bits.
100: Left justified. No shifting applied.
101-111: Reserved.
2:0
ADRPT Repeat Count.
Selects the number of conversions to perform and accumulate in Burst Mode. This bit
field must be set to 000 if Burst Mode is disabled.
000: Perform and Accumulate 1 conversion (not used in 12-bit mode).
001: Perform and Accumulate 4 conversions (1 conversion in 12-bit mode).
010: Perform and Accumulate 8 conversions (2 conversions in 12-bit mode).
011: Perform and Accumulate 16 conversions (4 conversions in 12-bit mode).
100: Perform and Accumulate 32 conversions (8 conversions in 12-bit mode).
101: Perform and Accumulate 64 conversions (16 conversions in 12-bit mode).
110-111: Reserved.
96
Rev. 1.0