C8051F850-C-GM Datasheet, PDF (170/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

20.3.4. High-Speed Output Mode
In High-Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic 1. An
interrupt request is generated if the CCFn interrupt for that module is enabled. The CCFn bit is not
automatically cleared by hardware when the CPU vectors to the interrupt service routine, and must be
cleared by software. Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the
High-Speed Output mode. If ECOMn is cleared, the associated pin will retain its state, and not toggle on
the next match event.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to 0; writing to PCA0CPHn sets ECOMn to 1.
PCA0CPLn PCA0CPHn
ECOMn
(Compare Enable)
16-bit Comparator
MATn (Match Enable)
match
CCFn
(Interrupt Flag)
PCA Clock
PCA0L
PCA0H
Toggle
CEXn
TOGn (Toggle Enable)
Figure 20.4. PCA High-Speed Output Mode Diagram
150
Rev. 1.0