C8051F850-C-GM Datasheet, PDF (208/328 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

Register 21.3. XBR2: Port I/O Crossbar 2
Bit
7
6
5
4
3
2
1
0
Name WEAKPUD XBARE
Reserved
Type
RW
RW
R
Reset
0
0
0
0
0
0
0
0
SFR Address: 0xE3
Table 21.6. XBR2 Register Bit Descriptions
Bit
Name
Function
7
WEAKPUD Port I/O Weak Pullup Disable.
0: Weak Pullups enabled (except for Ports whose I/O are configured for analog mode).
1: Weak Pullups disabled.
6
XBARE Crossbar Enable.
0: Crossbar disabled.
1: Crossbar enabled.
5:0
Reserved Must write reset value.
187
Rev. 1.0