SH7712 Datasheet, PDF (954/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 24 Electrical Characteristics
24.3.12 Port Input/Output Timing
Table 24.14 Port Input/Output Timing
(Conditions: V_CCQ = V_CCQ-RTC = 3.0 to 3.6 V, V_CC = V_CC-PLL1 = V_CC-PLL2 = 1.4 to 1.6 V,
V Q = V = V Q-RTC = V -PLL1 = V -PLL2 = 0 V, T = –20 to 75°C)
SS
SS
SS
SS
SS
a
Module Item
Symbol Min.
Max. Unit Figure
Port Output data delay time
t_PORTD
—
17
ns
24.69
Input data B:P clock ratio = 1:1 t
15
—
PORTS
setup time _{B:P clock ratio = 2:1}
t +15
—
cyc
B:P clock ratio = 4:1
3
×
t +15
cyc
—
Input data hold time
t
8
—
PORTH
Note: t_cyc is the output cycle time of the CKIO clock.
CKIO
Port 7 to 0
(read)
Port 7 to 0
(write)
t_PORTS t_PORTH
t_PORTD
Figure 24.69 I/O Port Timing
Rev. 1.00 Dec. 27, 2005 Page 912 of 932
REJ09B0269-0100