SH7712 Datasheet, PDF (746/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.55 Receive Frame Counter Register (Port 1) (Normal and Error Reception)
(RXALCR1)
RXALCR1 is a 32-bit counter indicating the number of frames successfully received and frames
received with error in MAC-1. When the value in this register reaches H'FFFFFFFF, the count is
halted. The counter value is cleared to 0 by a read to this register. This register cannot be written.
Bit
Bit Name
31 to 0 RC131 to
RC100
Initial
Value
All 0
R/W Description
R
Port 1 Receive Frame Counter Bit
These bits indicate the number of frames successfully
received and frames received with error.
18.3.56 Relay Frame Counter Register (Port 0 to 1) (Normal Relay Only) (FWNLCR1)
FWNLCR1 is a 32-bit counter indicating the number of frames successfully relayed in port 0 to 1
relay operations. When the value in this register reaches H'FFFFFFFF, the count is halted. The
counter value is cleared to 0 by a read to this register. This register cannot be written.
Initial
Bit
Bit Name Value R/W Description
31 to 0 NFC131 to All 0 R
NFC100
Port 0 to 1 Relay Frame Counter Bit
These bits indicate the number of frames successfully
relayed.
Rev. 1.00 Dec. 27, 2005 Page 704 of 932
REJ09B0269-0100