SH7712 Datasheet, PDF (469/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 12 Bus State Controller (BSC)
CKIO
A25 to A0
A12/A11*¹
CSn
RAS
CAS
RD/WR
DQMxx
D31 to D0
BS
DACKn*²
Tnop Tc1
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 12.23 Single Write Timing (Bank Active, Same Row Address)
Rev. 1.00 Dec. 27, 2005 Page 427 of 932
REJ09B0269-0100