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| SH7712 Datasheet, PDF (894/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series | |||
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Section 23 List of Registers
Register
Abbreviation
FWALCR1
TSU_ADRHn
(n = 0 to 31)
TSU_ADRLn
(n = 0 to 31)
EDMRn
(n = 0, 1)
EDTRRn
(n = 0, 1)
EDRRRn
(n = 0, 1)
TDLARn
(n = 0, 1)
RDLARn
(n = 0, 1)
EESRn
(n = 0, 1)
EESIPRn
(n = 0, 1)
TRSCERn
(n = 0, 1)
RMFCRn
(n = 0, 1)
TFTRn
(n = 0, 1)
FDRn
(n = 0, 1)
RMCRn
(n = 0, 1)
EDOCRn
(n = 0, 1)
RBWARn
(n = 0, 1)
RDFARn
(n = 0, 1)
Power-on
Reset*1
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Manual
Reset*1
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Software
standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Standby


Sleep
Retained
Retained
Module
EtherC

Retained

Retained E-DMAC

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained
Rev. 1.00 Dec. 27, 2005 Page 852 of 932
REJ09B0269-0100
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