SH7712 Datasheet, PDF (744/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.51 Relay Frame Counter Register (Port 1 to 0) (Normal and Error Relay)
(FWALCR0)
FWALCR0 is a 32-bit counter indicating the number of frames successfully relayed and frames
relayed with error in port 1 to 0 relay operations. When the value in this register reaches
H'FFFFFFFF, the count is halted. The counter value is cleared to 0 by a read to this register. This
register cannot be written.
Bit
Bit Name
31 to 0 FC031 to
FC000
Initial
Value
All 0
R/W Description
R
Port 1 to 0 Relay Frame Counter Bit
These bits indicate the number of frames successfully
relayed and frames relayed with error.
18.3.52 Transmit Frame Counter Register (Port 1) (Normal Transmission Only)
(TXNLCR1)
TXNLCR1 is a 32-bit counter indicating the number of frames successfully transmitted in MAC-
1. When the value in this register reaches H'FFFFFFFF, the count is halted. The counter value is
cleared to 0 by a read to this register. This register cannot be written.
Initial
Bit
Bit Name Value
31 to 0 NTC131 to All 0
NTC100
R/W Description
R
Port 1 Transmit Frame Counter Bit
These bits indicate the number of frames successfully
transmitted.
Rev. 1.00 Dec. 27, 2005 Page 702 of 932
REJ09B0269-0100