SH7712 Datasheet, PDF(284/978 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7712 Datasheet, PDF (284/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

◁

Section 8 Interrupt Controller (INTC)

Interrupt Source

Interrupt Code

Interrupt

Priority

Priority

IPR

within IPR Default

(Initial Value) (Bit Numbers) Setting Unit Priority

RTC ATI

Hâ²480*2

0 to 15 (0) IPRA (3 to 0) High

High

PRI

Hâ²4A0*2

CUI

Hâ²4C0*2

Low

WDT ITI

Hâ²560*2

0 to 15 (0) IPRB (15 to 12) ï£§

REF RCMI

Hâ²580*2

0 to 15 (0) IPRB (11 to 8) ï£§

Low

Notes: 1. INTEVT2 code

2. The code set in INTEVT is as same as INTEVT2.

3. The code that indicates the interrupt level (Hâ²200 to Hâ²3C0) is set in INTEVT. For details

on correspondence between the interrupt level and INTEVT, see table 8.4.

Rev. 1.00 Dec. 27, 2005 Page 242 of 932

REJ09B0269-0100

▷