SH7712 Datasheet, PDF (609/978 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Figure 16.5 shows an example of the operation for transmission in asynchronous mode.
1
Serial
data
Start
bit
0 D0
Data
Parity Stop Start
bit bit bit
D1
D7 0/1 1 0 D0
Parity Stop
Data
bit bit
1
D1
D7 0/1 1 ^{Idle state}
(mark state)
TDFE
TEND
TXI interrupt
request
Data written to SCFTDR
and TDFE flag read as
1 and then cleared to 0
by TXI interrupt handler
TXI interrupt
request
One frame
Figure 16.5 Example of Transmit Operation
(Example of 8-Bit Data with Parity and 1 Stop Bit)
Rev. 1.00 Dec. 27, 2005 Page 567 of 932
REJ09B0269-0100