GXLV Datasheet, PDF (98/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Integrated Functions (Continued)
FFFF FFFFh
MAX
DRAM Map
Graphics Memory
(Frame Buffer, etc.)
Physical Address Map
ROM Access
(256 KB)
PCI Access
Graphics Memory
(Frame Buffer, etc.)
SMM System Code
Power Management Registers
(See Table 5-1 on page 181)
Memory Controller Registers
(See Table 4-14 on page 112)
Display Controller Registers
(See Table 4-28 on page 141)
Graphics Pipeline Registers
(See Table 4-23 on page 129)
Internal Bus IF Unit Registers
(See Table 4-8 on page 104)
PCI Access
Available to the system
Scratchpad RAM
(See Table 4-3 on page 100)
FFFFFFFFh (4 GB)
MAX
FFFC0000h
GX_BASE+8800000h
GX_BASE+800000h
GX_BASE+400000h
GX_BASE+9000h
GX_BASE+8500h
GX_BASE+8400h
GX_BASE+8300h
GX_BASE+8100h
GX_BASE+8000h
GX_BASE+1000h
GX_BASE
*GBADD or Top of DRAM
100000h (1 MB)
E8000h
E0000h
C0000h
Extended Memory
Shadowed System BIOS
Shadowed Video BIOS
UMBs and
Expansion ROMs
SMM System Code
A0000h (640 KB)
0h
Conventional Memory
PCI Access
Available to the system
Extended Memory
*Top of DRAM
System BIOS
Video BIOS
UMBs and Expansion ROMs
VGA/MDA
Frame Buffers
(Soft VGA and/or PCA/ISA)
Conventional Memory
100000h (1 MB)
E8000h
E0000h
C0000h
A0000h (640 KB)
0h
* See BC_DRAM_TOP in Table 4-8 on page 104 or MC_GBASE_ADD in Table 4-15 on page 116.
Figure 4-2. GXLV Processor Memory Space
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Revision 1.1