GXLV Datasheet, PDF (70/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Processor Programming (Continued)
3.5.3 Descriptors
3.5.3.1 Global and Local Descriptor Table Registers
The GDT and LDT descriptor tables are defined by the
Global Descriptor Table Register (GDTR) and the Local
Descriptor Table Register (LDTR) respectively. Some texts
refer to these registers as GDT and LDT descriptors.
The following instructions are used in conjunction with the
GDT and LDT registers:
• LGDT - Load memory to GDTR
• LLDT - Load memory to LDTR
• SGDT - Store GDTR to memory
• SLDT - Store LDTR to memory
The GDTR is set up in real mode using the LGDT instruc-
tion. This is possible as the LGDT instruction is one of two
instructions that directly load a linear address (instead of
a segment relative address) in protected mode. (The other
instruction is the Load Interrupt Descriptor Table [LIDT]).
As shown in Table 3-20, the GDTR contains a BASE field
and a LIMIT field that define the GDTs. The Interrupt
Descriptor Table Register (IDTR) is described in Section
3.5.3.3 “Task, Gate, Interrupt, and Application and System
Descriptors” on page 71.
Also shown in Table 3-20, the LDTR is only two bytes wide
as it contains only a SELECTOR field. The contents of the
SELECTOR field point to a descriptor in the GDT.
3.5.3.2 Segment Descriptors
There are several types of descriptors. A segment
descriptor defines the base address, limit, and attributes
of a memory segment.
The GDT or LDT can hold several types of descriptors. In
particular, the segment descriptors are stored in either of
two registers, the GDT or the LDT. Either of these tables
can store as many as 8,192 (2¹³) 8-byte selectors taking
as much as 64 KB of memory.
The first descriptor in the GDT (location 0) is not used by
the CPU and is referred to as the “null descriptor.”
Types of Segment Descriptors
The type of memory segments are defined by correspond-
ing types of segment descriptors:
• Code Segment Descriptors
• Data Segment Descriptors
• Stack Segment Descriptors
• LDT Segment Descriptors
47
GDT Register
IDT Register
BASE
BASE
Table 3-20. GDT, LDT and IDT Registers
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Global Descriptor Table Register
LIMIT
Interrupt Descriptor Table Register
LIMIT
LDT Register Local Descriptor Table Register
SELECTOR
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