GXLV Datasheet, PDF (117/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Integrated Functions (Continued)
4.3.5 Address Translation
The memory controller supports two address translations
depending on the method used to interleave pages. The
hardware automatically enables high order interleaving.
Low order interleaving is automatically enabled only under
specific memory configurations.
4.3.5.1 High Order Interleaving
High Order Interleaving (HOI) uses the most significant
address bits to select which bank the page is located in.
This interleaving scheme works with any mixture of DIMM
types. However, it spreads the pages over wide address
ranges. For example, two 8 MB DIMMs contain a total of
four component pages. Two pages are together in one
DIMM separated from the other two pages by 8 MB.
4.3.5.2 Auto Low Order Interleaving
The memory controller requires that banks 0:1 if both
installed, be identical and banks 2:1 if both installed, be
identical. When banks 0:1 are installed or banks 2,3 are
installed Auto Low Order Interleaving (LOI) is in effect for
those bank pairs. Therefore each DIMM (banks 0:1 or 2:3)
must have the same number of DIMM banks, component
banks, module sizes and page sizes.
LOI uses the least significant bits after the page bits to
select which bank the page is located in. This requires
that memory is a power of 2, that the number of banks is a
power of 2, and that the page sizes are the same. As
stated before, for LOI to work, the DIMMs have to be of
the same type. LOI does give a good benefit by providing
a moving page throughout memory. Using the same
example as above, two banks would be on one DIMM and
the next two banks would be on the second DIMM, but
they would be linear in address space. For an eight bank
system that has 1 KB address (8 KB data) pages, there
would be an effective moving page of 64 KB of data.
4.3.5.3 Physical Address to DRAM Address
Conversion
Tables 4-16 and 4-17 give Auto LOI address conversion
examples when two DIMMs of the same size are used in a
system. Table 4-16 shows a one DIMM bank conversion
example, while Table 4-17 shows a two DIMM bank exam-
ple.
Tables 4-18 and 4-19 give Non-Auto LOI address conver-
sion examples when either one or two DIMMs of different
sizes are used in a system. Table 4-18 shows a one DIMM
bank address conversion example, while Table 4-19
shows a two DIMM bank example. The addresses are
computed on a per DIMM basis.
Since the DRAM interface is 64 bits wide, the lower three
bits of the physical address get mapped onto the
DQM[7:0] lines. Thus, the address conversion tables
(Tables 4-16 through 4-19) show the physical address
starting from A3.
Revision 1.1
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