GXLV Datasheet, PDF (72/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Processor Programming (Continued)
Bit
31:24
7:0
31:16
19:16
15:0
Memory
Offset
+4
+4
+0
+4
+0
23
+4
22
+4
20
+4
15
+4
14:13
+4
12
+4
11:8
+4
Name
BASE
LIMIT
G
D
AVL
P
DPL
S
TYPE
Table 3-22. Descriptors Bit Definitions
Description
Segment Base Address: Three fields which collectively define the base location for the segment in
4 GB physical address space.
Segment Limit: Two fields that define the size of the segment based on the Segment Limit
Granularity Bit.
If G = 1: Limit value interpreted in units of 4 KB.
If G = 0: Limit value is interpreted in bytes.
Segment Limit Granularity Bit: Defines LIMIT multiplier.
If G = 1: Limit value interpreted in units of 4 KB. Segment size ranges from 4 KB to 4 GB.
If G = 0: Limit value is interpreted in bytes. Segment size ranges from 1 byte to 1 MB.
Default Length for Operands and Effective Addresses:
If D = 1: Code segment = 32-bit length for operands and effective addresses.
If D = 0: Code segment = 16-bit length for operands and effective addresses.
If D = 1: Data segment = Pushes, calls and pop instructions use 32-bit ESP register.
If D = 0: Data segment = Stack operations use 16-bit SP register.
Segment Available: This field is available for use by system software.
Segment Present:
If = 1: Segment is memory segment allocated.
If = 0: The BASE and LIMIT fields become available for use by the system. Also, If = 0, a segment-
not-present exception generated when selector for the descriptor is loaded into a segment register
allowing virtual memory management.
Descriptor Privilege Level:
If = 00: Highest privilege level
If = 11: Lowest privilege level
Descriptor Type:
If = 1: Code or data segment
If = 0: System segment
Segment Type: Refer to Table 3-23 for TYPE bit definitions.
Bit 11 = Executable
Bit 10 = Conforming if Bit 12 = 1
Bit 10 = Expand Down if Bit 12 = 0
Bit 9 = Readable, if Bit 12 = 1
Bit 9 = Writable, if Bit 12 = 0
Bit 8 = Accessed
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