GXLV Datasheet, PDF (32/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Signal Definitions (Continued)
2.2.1 System Interface Signals (Continued)
Signal Name
BGA SPGA
Pin No. Pin No.
Type
SMI#
C19
B28
I
SUSP#
H2
M4
I
(PU)
(PU)
SUSPA#
E2
H4
O
SERIALP
L3
Q1
O
Description
System Management Interrupt
SMI# is a level-sensitive interrupt. SMI# puts the GXLV proces-
sor into System Management Mode (SMM).
Suspend Request
This signal is used to request that the GXLV processor enter
Suspend mode. After recognition of an active SUSP# input, the
processor completes execution of the current instruction, any
pending decoded instructions and associated bus cycles.
SUSP# is enabled by setting the SUSP bit in CCR2, and is
ignored following RESET. (See Table 3-11 on page 52 for CCR2
bit definitions.)
Since the GXLV processor includes system logic functions as
well as the CPU core, there are special modes designed to sup-
port the different power management states associated with
APM, ACPI, and portable designs. The part can be configured to
stop only the CPU core clocks, or all clocks. When all clocks are
stopped, the external clock can also be stopped. (See Section
5.0 “Power Management” on page 176 for more details regarding
power management states.)
This pin is internally connected to a weak (>20-kohm) pull-up
resistor.
Suspend Acknowledge
Suspend Acknowledge indicates that the GXLV processor has
entered low-power Suspend mode as a result of SUSP# asser-
tion or execution of a HALT instruction. SUSPA# floats following
RESET and is enabled by setting the SUSP bit in CCR2. (See
Table 3-11 on page 52 for CCR2 bit definitions.)
The SYSCLK input may be stopped after SUSPA# has been
asserted to further reduce power consumption if the system is
configured for 3V Suspend mode. (see Section 5.1.4 “3 Volt Sus-
pend” on page 177 for details regarding this mode).
Serial Packet
Serial Packet is the single wire serial-transmission signal to the
CS5530 chip. The clock used for this interface is SYSCLK. This
interface carries packets of miscellaneous information to the
chipset to be used by the VSA technology software handlers.
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