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GXLV Datasheet, PDF (131/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions
Integrated Functions (Continued)
Table 4-24. Graphics Pipeline Configuration Registers (Continued)
Bit
Name Description
GX_BASE+8110h-8111h
GP_PAT_COLOR_0 Register (R/W)
Default Value = 0000h
15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.
16-bpp Mode: 16-bpp color (RGB)
Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.
GX_BASE+8112h-8113h
GP_PAT_COLOR_1 Register (R/W)
Default Value = 0000h
15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.
16-bpp Mode: 16-bpp color (RGB)
Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.
GX_BASE+8114h-8115h
GP_PAT_COLOR_2 Register (R/W)
Default Value = 0000h
15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.
16-bpp Mode: 16-bpp color (RGB)
Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.
GX_BASE+8116h-8117h
GP_PAT_COLOR_3 Register (R/W)
Default Value = 0000h
15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.
16-bpp Mode: 16-bpp color (RGB)
Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.
GX_BASE+8120h-8123h
GP_PAT_DATA_0 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 0: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_0 register corresponds to bits [31:0] of the pattern data.
GX_BASE+8124h-8127h
GP_PAT_DATA_1 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 1: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_1 register corresponds to bits [63:32] of the pattern data.
GX_BASE+8128h-812Bh
GP_PAT_DATA_2 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 2: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_2 register corresponds to bits [95:64] of the pattern data.
GX_BASE+812Ch-812Fh
GP_PAT_DATA_3 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 3: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_3 register corresponds to bits [127:96] of the pattern data.
GX_BASE+8140h-8143h
GP_VGA_WRITE Register (R/W)
Default Value = xxxxxxxxh
Note that the register at GX_BASE+82140h is located in the area designated for the graphics pipeline but is used for VGA emulation
purposes. Refer to Table 4-39 on page 165 for this register’s bit formats.
GX_BASE+8144h-8147h
GP_VGA_READ Register (R/W)
Default Value = 00000000h
Note that the register at GX_BASE+8144h is located in the area designated for the graphics pipeline but is used for VGA emulation
purposes. Refer to Table 4-39 on page 165 for this register’s bit formats.
GX_BASE+8200h-8203h
GP_RASTER_MODE Register (R/W)
Default Value = 00000000h
31:13
12
11
10
RSVD
TB
ST
PT
Reserved: Set to 0.
Transparent BLT: When set, this bit enables transparent BLT. The source color data will be compared to a
color key and if it matches, that pixel will not be drawn. The color key value is stored in the BLT buffer as des-
tination data. The raster operation must be set to C6h, and the pattern registers must be all F’s for this mode
to work properly.
Source Transparency: Enables transparency for monochrome source data. Those pixels corresponding to
clear bits in the source data are not drawn.
Pattern Transparency: Enables transparency for monochrome pattern data. Those pixels corresponding to
clear bits in the pattern data are not drawn.
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