GXLV Datasheet, PDF (149/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Integrated Functions (Continued)
Table 4-30. Display Controller Memory Organization Registers (Continued)
Bit
Name
Description
9:0
FB_LINE_ Frame Buffer Line Delta: This value represents number of DWORDs that, when added to the starting
DELTA
offset of the previous line, will point to the start of the next frame buffer line in memory. It is used to
always maintain a pointer to the starting offset for the frame buffer line being loaded into the display
FIFO.
GX_BASE+8328h-832Bh
DC_BUF_SIZE Register (R/W) (Locked)
Default Value = xxxxxxxxh
31:30
29:16
15:9
8:0
RSVD
VID_BUF_
SIZE
CB_LINE_
SIZE
FB_LINE_
SIZE
Reserved: Set to 0.
Video Buffer Size: These bits set the video buffer size, in 64-byte segments. The maximum size is 1
MB.
Compressed Display Buffer Line Size: This value represents the number of DWORDs for a valid com-
pressed line plus 1. It is used to detect an overflow of the compressed data FIFO. It should never be
larger than 41h since the maximum size of the compressed data FIFO is 64 DWORDs.
Frame Buffer Line Size: This value specifies the number of QWORDS (8-byte segments) to transfer for
each display line from the frame buffer.
If panning is enabled, this value can generally be programmed to the displayed number of QWORDS + 2
so that enough data is transferred to handle any possible alignment. Extra pixel data in the FIFO at the
end of a line will automatically be discarded.
GX_BASE+832Ch-832Fh
Reserved
Default Value = 00000000h
Revision 1.1
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