GXLV Datasheet, PDF (228/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Instruction Set (Continued)
Table 8-27. Processor Core Instruction Set Summary (Continued)
Flags
Real Prot’d Real Prot’d
Mode Mode Mode Mode
Instruction
LEA Load Effective Address
No Index Register
With Index Register
LES Load Pointer to ES
LFS Load Pointer to FS
LGDT Load GDT Register
LGS Load Pointer to GS
LIDT Load IDT Register
LLDT Load LDT Register
From Register/Memory
LMSW Load Machine Status Word
From Register/Memory
LODS Load String
LSL Load Segment Limit
From Register/Memory
LSS Load Pointer to SS
LTR Load Task Register
From Register/Memory
LEAVE Leave Current Stack Frame
LOOP Offset Loop/No Loop
LOOPNZ/LOOPNE Offset
LOOPZ/LOOPE Offset
MOV Move Data
Register to Register
Register to Memory
Register/Memory to Register
Immediate to Register/Memory
Immediate to Register (short form)
Memory to Accumulator (short form)
Accumulator to Memory (short form)
Register/Memory to Segment Register
Segment Register to Register/Memory
MOV Move to/from Control/Debug/Test Regs
Register to CR0/CR2/CR3/CR4
CR0/CR2/CR3/CR4 to Register
Register to DR0-DR3
DR0-DR3 to Register
Register to DR6-DR7
DR6-DR7 to Register
Register to TR3-5
TR3-5 to Register
Register to TR6-TR7
TR6-TR7 to Register
MOVS Move String
MOVSX Move with Sign Extension
Register from Register/Memory
MOVZX Move with Zero Extension
Register from Register/Memory
MUL Unsigned Multiply
Accumulator with Register/Memory
Multiplier: Byte
Word
Doubleword
Opcode
O D I T S Z A P C Clock Count
F F F F F F F F F (Reg/Cache Hit)
Issues
8D [mod reg r/m]
C4 [mod reg r/m]
0F B4 [mod reg r/m]
0F 01 [mod 010 r/m]
0F B5 [mod reg r/m]
0F 01 [mod 011 r/m]
---------
1
1
---------
4
---------
4
---------
10
---------
4
---------
10
1
1
9
b
h,i,j
9
b
h,i,j
10
b,c
h,l
9
b
h,i,j
10
b,c
h,l
0F 00 [mod 010 r/m]
---------
8
a g,h,j,l
0F 01 [mod 110 r/m]
A [110 w]
---------
11
---------
3
11
b,c
h,l
3
b
h
0F 03 [mod reg r/m]
0F B2 [mod reg r/m]
- - - - - x- - -
---------
4
9
a g,h,j,p
10
a
h,i,j
0F 00 [mod 011 r/m]
C9
E2 +
E0 +
E1 +
---------
---------
4
---------
2
---------
2
---------
2
9
a g,h,j,l
4
b
h
2
r
2
r
2
r
8 [10dw] [11 reg r/m]
---------
1
8 [100w] [mod reg r/m]
1
8 [101w] [mod reg r/m]
1
C [011w] [mod 000 r/m] ###
1
B [w reg] ###
1
A [000w] +++
1
A [001w] +++
1
8E [mod sreg3 r/m]
1
8C [mod sreg3 r/m]
1
1
b
h,i,j
1
1
1
1
1
1
6
1
0F 22 [11 eee reg]
0F 20 [11 eee reg]
0F 23 [11 eee reg]
0F 21 [11 eee reg]
0F 23 [11 eee reg]
0F 21 [11 eee reg]
0F 26 [11 eee reg]
0F 24 [11 eee reg]
0F 26 [11 eee reg]
0F 24 [11 eee reg]
A [010w]
- - - - - - - - - 20/5/5 18/5/6
l
6
6
10
10
9
9
10
10
9
9
16
16
8
8
11
11
3
3
---------
6
6
b
h
0F B[111w] [mod reg r/m]
---------
1
1
b
h
0F B[011w] [mod reg r/m]
---------
1
1
b
h
F [011w] [mod 100 r/m]
x- - - xxuux
b
h
4
4
5
5
15
15
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