GXLV Datasheet, PDF (180/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Power Management (Continued)
5.2.3 Stopping the Input Clock
The GXLV processor is a static device, allowing the input
clock (SYSCLK) to be stopped and restarted without any
loss of internal CPU data. The SYSCLK input can be
stopped at either a logic high or logic low state. The
required sequence for stopping SYSCLK is to initiate 3
Volt Suspend, wait for the assertion of SUSPA# by the
processor, and then stop the input clock.
The CPU remains suspended until SYSCLK is restarted
and the Suspend mode is exited as described earlier.
While SYSCLK is stopped, the processor can no longer
sample and respond to any input stimulus including
REQx#, NMI, SMI#, INTR, and RESET inputs.
Figure 5-4 illustrates the recommended sequence for
stopping the SYSCLK using SUSP# to initiate 3 Volt Sus-
pend. SYSCLK may be started prior to or following nega-
tion of the SUSP# input. The figure includes the
SUSP_3V pin from the Geode I/O companion which is
used to stop the external clocks.
5.2.4 Serial Packet Transmission
The GXLV processor transmits the contents of the “PM
Serial Packet Register” on the SERIALP output pin to the
PSERIAL input pin of the Geode I/O companion. The
GXLV processor holds SERIALP low until the transmis-
sion interval counter (GX_BASE+8504h[4:3]) has
elapsed. Once the counter has elapsed, PSERIAL is held
high for two SYSCLKs to indicate the start of packet trans-
mission.
The contents of the packet register are then shifted out
starting from bit 7 down to bit 0. PSERIAL is held high for
one SYSCLK to indicate the end of packet transmission
and then remains low until the next transmission interval.
After the packet transmission has completed, the packet
contents are cleared.
SYSCLK
SUSP#
SUSPA#
SUSP_3V
(I/O companion)
SMI Event, Timer or Pin
Figure 5-4. Stopping SYSCLK During Suspend Mode
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