GXLV Datasheet, PDF (89/247 Pages) National Semiconductor (TI) – Geode™ GXLV Processor Series Low Power Integrated x86 Solutions

Processor Programming (Continued)
When SMI nesting is disabled, the processor holds off
external SMI interrupts until the currently executing SMM
code exits. When SMI nesting is enabled, the processor
can proceed with the SMI. The SMM service routine will
guarantee that no internal SMIs are generated in SMM, so
the processor ignores such events. If the internal and
external SMI signals are received simultaneously, then the
internal SMI is given priority to avoid losing the event.
The state diagram of the SMI_NEST and Nested SMI Sta-
tus bits are shown in Figure 3-11 with each state
explained next.
A. When the processor is outside of SMM, Nested SMI
Status is always clear and SMI_NEST is set high.
B. The first-level SMI interrupt is received by the
processor. The microcode clears SMI_NEST, sets
Nested SMI Status high and saves the previous value
of Nested SMI Status (0) in the SMM header.
C. The first-level SMM service routine saves the header
and sets SMI_NEST high to re-enable SMI interrupts
from SMM.
D. A second-level (nested) SMI interrupt is received by
the processor. This SMI is taken even though the
processor is in SMM because the SMI_NEST bit is
set high. The microcode clears SMI_NEST, sets
Nested SMI Status high and saves the previous value
of Nested SMI Status (1) in the SMM header.
E. The second-level SMM service routine saves the
header and sets SMI_NEST to re-enable SMI inter-
rupts within SMM. Another level of nesting could
occur during this period.
F. The second-level SMM service routine clears
SMI_NEST to disable SMI interrupts, then restores its
SMM header.
G. The second-level SMM service routine executes an
RSM. The microcode sets SMI_NEST, and restores
the Nested SMI Status (1) based on the SMM
header.
H. The first-level SMM service routine clears SMI_NEST
to disable SMI interrupts, then restores its SMM
header.
I. The first-level SMM service routine executes an
RSM. The microcode sets SMI_NEST high and
restores the Nested SMI Status (0) based on the
SMM header.
When the processor is outside of SMM, Nested SMI Sta-
tus is always clear and SMI_NEST is set high.
SMI_NEST
Nested SMI Status
A
B
C
D
E
F
G
H
I
Figure 3-11. SMI Nesting State Machine
Revision 1.1
89
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