MC68HC908LJ24 Datasheet, PDF (84/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Configuration Registers (CONFIG)
PCEH — Port C Enable High Nibble
Setting PCEH configures the PTC4/FP23–PTC7/FP26 pins for LCD
frontplane driver use. Reset clears this bit.
1 = PTC4/FP23–PTC7/FP26 pins configured as LCD frontplane
driver pins: FP23–FP26
0 = PTC4/FP23–PTC7/FP26 pins configured as standard I/O pins:
PTC4–PTC7
PCEL — Port C Enable Low Nibble
Setting PCEL configures the PTC0/FP19–PTC3/FP22 pins for LCD
frontplane driver use. Reset clears this bit.
1 = PTC0/FP19–PTC3/FP22 pins configured as LCD frontplane
driver pins: FP19–FP22
0 = PTC0/FP19–PTC3/FP22 pins configured as standard I/O pins:
PTC0–PTC3
LVISEL[1:0] — LVI Operating Mode Selection
LVISEL[1:0] selects the voltage operating mode of the LVI module.
(See Section 22. Low-Voltage Inhibit (LVI).) The voltage mode
selected for the LVI should match the operating V_DD. See Section 24.
Electrical Specifications for the LVI voltage trip points for each of
the modes.
Table 5-1. LVI Trip Point Selection
LVISEL1
LVISEL0
Operating Mode
0
0
Reserved
0
1
3.3 V⁽¹⁾
1
0
5V
1
1
Reserved
Notes:
1. Default setting after a power-on-reset.
Data Sheet
84
MC68HC908LJ24/LK24 — Rev. 2
Configuration Registers (CONFIG)
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