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MC68HC908LJ24 Datasheet, PDF (58/464 Pages) Motorola, Inc – Microcontrollers
Memory Map
Freescale Semiconductor, Inc.
Addr.
Register Name
Bit 7
6
PLL Reference Divider Read: 0
0
$003B
Select Register Write:
(PMDS) Reset: 0
0
ADC Status and Control Read: COCO AIEN
$003C
Register Write:
(ADCSR) Reset: 0
0
Read: ADx
ADx
$003D
ADC Data Register high
(ADRH)
Write:
R
R
Reset: 0
0
ADC Data Register low Read: ADx
ADx
$003E
(ADRL) Write: R
R
Reset: 0
0
$003F
ADC Clock Control Read:
Register
(ADCLK)
Write:
Reset:
ADIV2
0
ADIV1
0
RTC Calibration Control Read: 0
0
$0040
Register Write: R
R
(RTCCOMR) Reset: 0
0
RTC Calibration Data Read: EOVL
0
$0041
Register Write:
(RTCCDAT) Reset: U
0
$0042
Read:
RTC Control Register 1
(RTCCR1)
Write:
Reset:
ALMIE
0
CHRIE
0
$0043
Read:
RTC Control Register 2
(RTCCR2)
Write:
Reset:
COMEN
U
0
CHRCLR
0
†† Reset by POR only.
5
4
3
0
0
RDS3
0
0
0
ADCO ADCH4 ADCH3
0
1
1
ADx
ADx
ADx
R
R
R
0
0
0
ADx
ADx
ADx
R
R
R
0
0
0
ADIV0 ADICLK MODE1
0
0
0
CAL AUTOCAL OUTF1
0
0
0
E5
E4
E3
U
U
U
DAYIE HRIE MINIE
0
0
0
CHRE RTCE TBH
0
0††
0
2
1
Bit 0
RDS2 RDS1 RDS0
0
0
1
ADCH2 ADCH1 ADCH0
1
1
1
ADx
ADx
ADx
R
R
R
0
0
0
ADx
ADx
ADx
R
R
R
0
0
0
0
0
MODE0
R
1
0
0
0
0
OUTF0
RTCWE1 RTCWE0
0
1
0
E2
E1
E0
U
U
U
SECIE TB1IE TB2IE
0
0
0
0
0
0
0
0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 13)
Data Sheet
58
MC68HC908LJ24/LK24 — Rev. 2
Memory Map
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