MC68HC908LJ24 Datasheet, PDF (321/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Multi-Master IIC Interface (MMIIC)
Multi-Master IIC Registers
Addr. Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$006A
Multi-Master IIC ^Read:
Master Control Register Write:
(MIMCR) _Reset:
MMALIF
0
0
MMNAKIF
0
0
MMBB
0
MMAST
0
MMRW
0
MMBR2 MMBR1 MMBR0
0
0
0
$006B
Multi-Master IIC Address ^Read: _MMAD7
Register Write:
(MMADR) _{Reset: 1}
MMAD6
0
MMAD5
1
MMAD4
0
MMAD3
0
MMAD2
0
MMAD1 MMEXTAD
0
0
Multi-Master IIC Control ^Read: _{MMEN MMIEN}
0
0
0
MMTXAK REPSEN
0
$006C
Register Write:
(MMCR) _{Reset: 0}
0
0
0
0
0
0
0
$006D
Multi-Master IIC ^{Read: MMRXIF MMTXIF MMATCH MMSRW MMRXAK}
0
MMTXBE MMRXBF
Status Register Write: 0
0
(MMSR) _{Reset: 0}
0
0
0
1
0
1
0
$006E
Multi-Master IIC ^Read: _MMTD7
Data Transmit Register Write:
(MMDTR) _{Reset: 1}
MMTD6
1
MMTD5
1
MMTD4
1
MMTD3
1
MMTD2
1
MMTD1
1
MMTD0
1
$006F
Multi-Master IIC Read: MMRD7
Data Receive Register _Write:
(MMDRR)
Reset: 0
MMRD6
0
MMRD5
0
MMRD4
0
MMRD3
0
MMRD2
0
MMRD1
0
MMRD0
0
= Unimplemented
Figure 15-1. MMIIC I/O Register Summary
15.5 Multi-Master IIC Registers
Six registers are associated with the Multi-master IIC module, they are
outlined in the following sections.
15.5.1 Multi-Master IIC Address Register (MMADR)
Address: $006B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
MMAD7 MMAD6 MMAD5 MMAD4 MMAD3 MMAD2 MMAD1 MMEXTAD
Write:
Reset: 1
0
1
0
0
0
0
0
Figure 15-2. Multi-Master IIC Address Register (MMADR)
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Multi-Master IIC Interface (MMIIC)
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Go to: www.freescale.com
Data Sheet
321