MC68HC908LJ24 Datasheet, PDF (55/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Memory Map
Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
IRQ Status and Control ^{Read: 0}
0
0
0
IRQF
$001E
Register Write:
(INTSCR) _{Reset: 0}
0
0
0
0
Read:
0
$001F
Configuration Register 1
(CONFIG1)^†
Write:
COPRS
LVISTOP LVIRSTD LVIPWRD
Reset: 0
0
0
0^††
0
† One-time writable register after each reset.
†† Reset by POR only.
Timer 1 Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
$0020
Register Write: 0
TRST
(T1SC) _{Reset: 0}
0
1
0
0
$0021
Timer 1 Counter ^{Read: Bit 15}
14
13
12
11
Register High Write:
(T1CNTH) _{Reset: 0}
0
0
0
0
$0022
Timer 1 Counter ^{Read: Bit 7}
6
5
4
3
Register Low Write:
(T1CNTL) _{Reset: 0}
0
0
0
0
Timer 1 Counter Modulo ^Read: _{Bit 15}
14
13
12
11
$0023
Register High Write:
(T1MODH) _{Reset: 1}
1
1
1
1
Timer 1 Counter Modulo ^Read: _{Bit 7}
6
5
4
3
$0024
Register Low Write:
(T1MODL) _{Reset: 1}
1
1
1
1
Timer 1 Channel 0 Status ^Read:
$0025 and Control Register Write:
(T1SC0) _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B
0
Timer 1 Channel 0 ^Read: _{Bit 15}
14
13
12
11
$0026
Register High Write:
(T1CH0H) _{Reset: X}
X
X
X
X
2
0
ACK
0
SSREC
0
PS2
0
10
0
2
0
10
1
2
1
ELS0A
0
10
X
1
Bit 0
IMASK MODE
0
0
STOP COPD
0
0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
X
X
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 13)
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Memory Map
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Data Sheet
55