MC68HC908LJ24 Datasheet, PDF (376/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
18.2 Introduction
Forty-eight (48) bidirectional input-output (I/O) pins form six parallel
ports. All I/O pins are programmable as inputs or outputs.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
Addr.
Register Name
Bit 7
$0000
Read:
Port A Data Register
(PTA)
Write:
Reset:
PTA7
$0001
Read:
Port B Data Register
(PTB)
Write:
Reset:
PTB7
$0002
Read:
Port C Data Register
(PTC)
Write:
Reset:
PTC7
$0003
Read:
Port D Data Register
(PTD)
Write:
Reset:
PTD7
Read:
$0004
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0
Read:
$0005
Data Direction Register B
(DDRB)
Write:
Reset:
DDRB7
0
Read:
$0006
Data Direction Register C
(DDRC)
Write:
Reset:
DDRC7
0
Read:
$0007
Data Direction Register D
(DDRD)
Write:
Reset:
DDRD7
0
6
PTA6
PTB6
PTC6
PTD6
DDRA6
0
DDRB6
0
DDRC6
0
DDRD6
0
5
PTA5
PTB5
PTC5
PTD5
DDRA5
0
DDRB5
0
DDRC5
0
DDRD5
0
4
3
PTA4 PTA3
Unaffected by reset
PTB4 PTB3
Unaffected by reset
PTC4 PTC3
Unaffected by reset
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
DDRD4 DDRD3
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
DDRC2
0
DDRD2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
DDRC1
0
DDRD1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
DDRC0
0
DDRD0
0
Figure 18-1. I/O Port Register Summary
Data Sheet
376
MC68HC908LJ24/LK24 — Rev. 2
Input/Output (I/O) Ports
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA