MC68HC908LJ24 Datasheet, PDF (145/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
Reset and System Initialization
9.4.1 External Pin Reset
The RST pin circuit includes an internal pull-up device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the SIM
reset status register (SRSR) is set as long as RST is held low for a
minimum of 67 ICLK cycles, assuming that neither the POR nor the LVI
was the source of the reset. See Table 9-2 for details.
Figure 9-4 shows the relative timing.
Reset Type
POR/LVI
All others
Table 9-2. PIN Bit Set Timing
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
67 (64 + 3)
CGMOUT
RST
IAB PC
VECT H VECT L
Figure 9-4. External Reset Timing
9.4.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 ICLK cycles
to allow resetting of external peripherals. The internal reset signal IRST
continues to be asserted for an additional 32 cycles (see Figure 9-5). An
internal reset can be caused by an illegal address, illegal opcode, COP
timeout, LVI, or POR (see Figure 9-6).
NOTE:
For LVI or POR resets, the SIM cycles through 4096 + 32 ICLK cycles
during which the SIM forces the RST pin low. The internal reset signal
then follows the sequence from the falling edge of RST shown in
Figure 9-5.
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
System Integration Module (SIM)
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Data Sheet
145