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MC68HC908LJ24 Datasheet, PDF (124/464 Pages) Motorola, Inc – Microcontrollers
Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
8.5.1 External Filter Capacitor Pin (CGMXFC)
The CGMXFC pin is required by the loop filter to filter out phase
corrections. An external filter network is connected to this pin. (See
Figure 8-3.)
NOTE:
To prevent noise problems, the filter network should be placed as close
to the CGMXFC pin as possible, with minimum routing distances and no
routing of other signals across the network.
8.5.2 PLL Analog Power Pin (VDDA)
VDDA is a power pin used by the analog portions of the PLL. Connect the
VDDA pin to the same voltage potential as the VDD pin.
NOTE: Route VDDA carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
8.5.3 PLL Analog Ground Pin (VSSA)
VSSA is a ground pin used by the analog portions of the PLL. Connect
the VSSA pin to the same voltage potential as the VSS pin.
NOTE: Route VSSA carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
NOTE: On this MCU, the VSSA is physically bonded to the VSS pin.
8.5.4 Oscillator Output Frequency Signal (CGMXCLK)
CGMXCLK is the oscillator output signal. It runs at the full speed of the
oscillator, and is generated directly from the crystal oscillator circuit, the
RC oscillator circuit, or the internal oscillator circuit.
8.5.5 CGM Reference Clock (CGMRCLK)
CGMRCLK is a buffered version of CGMXCLK, this clock is the
reference clock for the phase-locked-loop circuit.
Data Sheet
124
MC68HC908LJ24/LK24 — Rev. 2
Clock Generator Module (CGM)
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