MC68HC908LJ24 Datasheet, PDF (63/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Memory Map
Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
$FE00
SIM
Break
Status
Register
(SBSR)
Write:
R
R
R
R
R
R
R
Note
Reset:
0
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
COP ILOP ILAD
0
LVI
0
$FE01
SIM
Reset
Status
Register
(SRSR)
Write:
POR: 1
0
0
0
0
0
0
0
$FE02
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset:
SIM Break Flag Control ^Read: _BCFE
R
R
R
R
R
R
R
$FE03
Register Write:
(SBFCR) _{Reset: 0}
Read: IF6
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Read: IF14
IF13
IF12
IF11
IF10
IF9
IF8
IF7
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Read: 0
0
0
0
IF18
IF17
IF16
IF15
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
$FE07
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset:
Read: 0
0
0
0
$FE08
FLASH Control Register
(FLCR)
Write:
HVEN MASS ERASE PGM
Reset: 0
0
0
0
0
0
0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 12 of 13)
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Memory Map
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Data Sheet
63