MC68HC908LJ24 Datasheet, PDF (311/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
I/O Signals
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See 14.8.2 Mode Fault Error.) For the state of the
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register. (See
Table 14-3.)
Table 14-3. SPI Configuration
SPE SPMSTR MODFEN
0
X⁽¹⁾
X
1
0
X
1
1
0
1
1
1
Note 1. X = Don’t care
SPI Configuration
Not enabled
Slave
Master without MODF
Master with MODF
State of SS Logic
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
14.13.5 CGND (Clock Ground)
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to V_SS as
shown in Table 14-1.
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Serial Peripheral Interface Module (SPI)
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Data Sheet
311