MC68HC908LJ24 Datasheet, PDF (198/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Timer Interface Module (TIM)
Addr.
Register Name
Bit 7
6
5
4
3
2
$0029
Read:
Timer 1 Channel 1
Bit 15
14
Register High Write:
(T1CH1H)
Reset:
13
12
11
10
Indeterminate after reset
Read:
Timer 1 Channel 1
Bit 7
6
$002A
Register Low Write:
(T1CH1L)
Reset:
5
4
3
2
Indeterminate after reset
Read: TOF
0
Timer 2 Status and
TOIE TSTOP
0
PS2
$002B
Control Register Write: 0
TRST
(T2SC)
Reset: 0
0
1
0
0
0
$002C
Read: Bit 15
14
13
12
11
10
Timer 2 Counter
Register High Write:
(T2CNTH)
Reset: 0
0
0
0
0
0
$002D
Read: Bit 7
6
5
4
3
2
Timer 2 Counter
Register Low Write:
(T2CNTL)
Reset: 0
0
0
0
0
0
Read:
Timer 2 Counter Modulo
Bit 15
14
13
12
11
10
$002E
Register High Write:
(T2MODH)
Reset: 1
1
1
1
1
1
Read:
Timer 2 Counter Modulo
Bit 7
6
5
4
3
2
$002F
Register Low Write:
(T2MODL)
Reset: 1
1
1
1
1
1
Read:
Timer 2 Channel 0 Status
$0030 and Control Register Write:
(T2SC0)
Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B ELS0A
0
0
$0031
Read:
Timer 2 Channel 0
Bit 15
14
Register High Write:
(T2CH0H)
Reset:
13
12
11
10
Indeterminate after reset
= Unimplemented
Figure 11-2. TIM I/O Register Summary (Sheet 2 of 3)
1
Bit 0
9
Bit 8
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
Data Sheet
198
MC68HC908LJ24/LK24 — Rev. 2
Timer Interface Module (TIM)
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