MC68HC908LJ24 Datasheet, PDF (289/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Pin Name Conventions and I/O Register Addresses
14.4 Pin Name Conventions and I/O Register Addresses
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in Table 14-1. The generic
pin names appear in the text that follows.
Table 14-1. Pin Name Conventions
SPI Generic
Pin Names:
MISO
MOSI
SS
SPSCK CGND
Full SPI
Pin Names:
SPI
PTD1/MISO
PTD2/MOSI
PTD0/SS
CALIN
PTD3/SPSCK/
CALOUT
V_SS
NOTE:
The SS and SPSCK pins are also shared with CALIN and CALOUT
respectively. To avoid erratic behavior, these two pins should never be
configured for use as SPI and RTC calibration simultaneously.
Figure 14-1 summarizes the SPI I/O registers.
Addr.
$0010
$0011
$0012
Register Name
Bit 7
6
5
4
3
2
1
Read:
SPI Control Register
(SPCR)
Write:
Reset:
SPRIE
0
R SPMSTR CPOL CPHA SPWOM SPE
0
1
0
1
0
0
Read:
SPI Status and Control
Register Write:
(SPSCR)
Reset:
SPRF
0
ERRIE
0
OVRF
0
MODF
0
SPTE
MODFEN SPR1
1
0
0
Read: R7
R6
R5
R4
R3
R2
R1
SPI Data Register
(SPDR)
Write:
T7
T6
T5
T4
T3
T2
T1
Reset:
Unaffected by reset
= Unimplemented
R = Reserved
Figure 14-1. SPI I/O Register Summary
Bit 0
SPTIE
0
SPR0
0
R0
T0
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Serial Peripheral Interface Module (SPI)
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Data Sheet
289