MC68HC908LJ24 Datasheet, PDF (211/464 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Timer Interface Module (TIM)
I/O Registers
Address: T1CNTL, $0022 and T2CNTL, $002D
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 11-6. TIM Counter Registers Low (TCNTL)
11.10.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the
TIM counter. When the TIM counter reaches the modulo value, the
overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH)
inhibits the TOF bit and overflow interrupts until the low byte (TMODL) is
written. Reset sets the TIM counter modulo registers.
Address: T1MODH, $0023 and T2MODH, $002E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
9
Bit 8
Reset: 1
1
1
1
1
1
1
1
Figure 11-7. TIM Counter Modulo Register High (TMODH)
Address: T1MODL, $0024 and T2MODL, $002F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 11-8. TIM Counter Modulo Register Low (TMODL)
NOTE: Reset the TIM counter before writing to the TIM counter modulo registers.
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
Timer Interface Module (TIM)
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
211