RG82855GMESL72L Datasheet, PDF (9/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

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Figures
Figure 1. Intel^® 855GM GMCH Chipset System Block Diagram ...................................... 16
Figure 2. Intel^® 855GME GMCH Chipset System Block Diagram .................................... 18
Figure 3. Configuration Address Register......................................................................... 56
Figure 4. Configuration Data Register .............................................................................. 57
Figure 5. PAM Registers ................................................................................................... 70
Figure 6. Simplified View of System Address Map ......................................................... 124
Figure 7. Detailed View of System Address Map ........................................................... 125
Figure 8. Intel^® 855GM GMCH Graphics Block Diagram ............................................... 141
Figure 9. Panel Power Sequencing ................................................................................ 156
Figure 10. XOR–Tree Chain ........................................................................................... 185
Figure 11. XOR Chain Test Mode Entry Events Diagram .............................................. 186
Figure 12. ALLZ Test Mode Entry Events Diagram ........................................................ 186
Figure 13. Intel^® 855GM/855GME GMCH Ballout Diagram (Top View)......................... 203
Figure 14. Intel^® 855GM/855GME GMCH Micro-FCBGA Package Dimensions
(Top View)................................................................................................................ 211
Figure 15. Intel^® 855GM/855GME GMCH Micro-FCBGA Package Dimensions
(Side View)............................................................................................................... 212
Figure 16. Intel^® 855GM/855GME GMCH Micro-FCBGA Package Dimensions
(Bottom View) .......................................................................................................... 213
Tables
Table 1. DDR SDRAM Memory Capacity ......................................................................... 25
Table 2. Intel^® 855GM/855GME GMCH Interface Clocks ................................................ 28
Table 3. Host Interface Signal Descriptions...................................................................... 30
Table 4. DDR SDRAM Interface Descriptions .................................................................. 32
Table 5. AGP Addressing Signal Descriptions ................................................................. 34
Table 6. AGP Flow Control Signals .................................................................................. 35
Table 7. AGP Status Signal Descriptions ......................................................................... 35
Table 8. AGP Strobe Descriptions .................................................................................... 36
Table 9. AGP/PCI Signals-Semantics Descriptions.......................................................... 36
Table 10. Hub Interface Signals........................................................................................ 39
Table 11. Clock Signals .................................................................................................... 39
Table 12. Dedicated LVDS LCD Flat Panel Interface Signal Descriptions....................... 41
Table 13. Digital Video Output B (DVOB) Port Signal Descriptions ................................. 42
Table 14. Intel^® 855GME GMCH AGP/DVO Pin Muxing.................................................. 43
Table 15. Digital Video Output C (DVOC) Port Signal Descriptions................................. 44
Table 16. DVOB and DVOC Port Common Signal Descriptions ...................................... 44
Table 17. Analog CRT Display Signal Descriptions ......................................................... 45
Table 18. GPIO Signal Descriptions ................................................................................. 46
Table 19. Voltage References, PLL Power....................................................................... 48
Table 20. Device Number Assignment ............................................................................. 51
Table 21. Nomenclature for Access Attributes ................................................................. 52
Table 22. VGA I/O Mapped Register List ......................................................................... 58
Table 23. Index – Data Registers ..................................................................................... 58
Table 24. GMCH Configuration Space - Device #0, Function#0 ...................................... 59
Table 25. Attribute Bit Assignment.................................................................................... 69
Datasheet
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