RG82855GMESL72L Datasheet, PDF (141/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

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Figure 8. Intel^® 855GM GMCH Graphics Block Diagram
DDR/SDRAM
Memory Control
Functional Description
Video Engine
(MPEG2 Decode)
2D Engine
Instr./
Data
3D Engine
Setup/Transform
Scan Conversion
Texture Engine
Raster Engine
Overlay
Sprite
Cursor
Cursor
Primary
Display
Secondary
Display
Display C
2^nd Overlay
Pipe A
Cntl
Alpha
Mux
Blend/
Port
Gamma/
CRC Pipe B
DAC
LVDS
DVOB
DVOC
6.4.1
6.4.2
High bandwidth access to data is provided through the system memory port. The GMCH uses a
tiling architecture to minimize page miss latencies and thus maximize effective rendering
bandwidth.
3D/2D Instruction Processing
The GMCH contains an extensive set of instructions that control various functions including 3D
rendering, BLT operations, display, MPEG decode acceleration, and overlay. The 3D instructions
set 3D pipeline states and control the processing functions. The 2D instructions provide an
efficient method for invoking BLT operations.
3D Engine
The 3D engine of the GMCH has been designed with a deeply pipelined architecture, where
performance is maximized by allowing each stage of the pipeline to simultaneously operate on
different primitives or portions of the same primitive. The GMCH supports the following:
• Perspective-corrected Texture mapping
• Multitexturing
• Embossed and Dot-Product Bump mapping
• Cubic Environment Maps
Datasheet
141