RG82855GMESL72L Datasheet, PDF (59/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

Register Description
R
4.8
Intel^® 855GM/GME GMCH Host-Hub Interface Bridge
Device Registers (Device #0, Function #0)
Table 24 summarizes the configuration space for Device #0, Function#0.
Table 24. GMCH Configuration Space - Device #0, Function#0
Register Name
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Sub-Class Code
Base Class Code
Header Type
Subsystem Vendor Identification
Subsystem Identification
Capabilities Pointer
Capability Identification
GMCH Misc. Control
GMCH Graphics Control
Device and Function Control
Fixed Dram Hole Control
Programmable Attribute Map
System Management RAM
Control
Extended System Management
RAM Control
Error Status
Error Command
SMI Command
SCI Command
Secondary Host Interface Control
Register
AGP Capability Identifier
AGP Status Register
Register
Symbol
VID
DID
PCICMD
PCISTS
RID
SUBC
BCC
HDR
SVID
SID
CAPPTR
CAPID
GMC
GGC
DAFC
FDHC
PAM (6:0)
SMRAM
ESMRAMC
ERRSTS
ERRCMD
SMICMD
SCICMD
SHIC
ACAPID
AGPSTAT
Register
Start
00
02
04
06
08
0A
0B
0E
2C
2E
34
40
50
52
54
58
59
60
61
62
64
66
67
74
A0
A4
Register
End
01
03
05
07
08
0A
0B
0E
2D
2F
34
44
51
53
55
58
5F
60
61
63
65
66
67
77
A3
A7
Default Value
8086h
3580h
0006h
0090h
02h
00h
06h
80h
0000h
0000h
40h
84_A105_0009h
0000h
0030h
0000h
00h
00h Each
02h
38h
0000h
0000h
00h
00h
00006010h
00200002h
1F000217h
Access
RO
RO
RO,R/W
RO,R/WC
RO
RO
RO
RO
R/WO
R/WO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W/L
R/W/L
R/WC
R/W
R/W
R/W
RO, R/W
RO
RO
Datasheet
59