RG82855GMESL72L Datasheet, PDF (11/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

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Revision History
Revision
Number
001
002
003
Description
Date
Initial release
Updates include:
• Edited 855GM features under Host Bus Support
• Changed naming convention for Host Bus from Processor System Bus
(PSB) to Front Side Bus (FSB)
• Added 855GME features and system diagram to features section
• Section 1: Added disclaimer for Intel^® Centrino™ mobile technology
• Updated Reference Documents list
• Section 2: Added System architecture details for 855GM/855GME
• Section 3: Updated section with AGP Interface signal details, which is
supported by 855GME
⎯ Updated Sections 3.3.1-3.3.5 and Section 3.6
• Section 4: Added registers related to Host Interface and AGP port
• Section 5: Updated sections for AGP memory addresses
• Section 6: Incorporated 855GME features as Bi-Cubic filtering, video
mixer rendering
⎯ Added Sections 6.5.2.10 – 6.5.6 with AGP Interface overview
• Section 7: Updated Power and Thermal management with features as
system memory refresh
• Section 8: Added XOR Test Mode Entry subsection
⎯ Added Note to Voltage table to indicate 855GME nominal voltage
levels.
• Edited Package Dimensions (Bottom View) figure, row Z (original)
renamed row Y
Updates include:
• Added Intel^® Celeron^® M processor support
July 2003
September
2003
January 2004
004
Updates include:
May 2004
• Added Intel^® Pentium^® M processor on 90 nm process with 2-MB L2
Cache support
Updated Table 55. Ballout Table to include AGP signals
Datasheet
11